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MICRO
2000
IEEE
72views Hardware» more  MICRO 2000»
15 years 3 months ago
PipeRench implementation of the instruction path coprocessor
This paper demonstrates how an Instruction Path Coprocessor (I-COP) can be efficiently implemented using the PipeRench reconfigurable architecture. An I-COP is a programmable on-c...
Yuan C. Chou, Pazhani Pillai, Herman Schmit, John ...
CVPR
2008
IEEE
16 years 6 months ago
Who killed the directed model?
Prior distributions are useful for robust low-level vision, and undirected models (e.g. Markov Random Fields) have become a central tool for this purpose. Though sometimes these p...
Justin Domke, Alap Karapurkar, Yiannis Aloimonos
ICCV
2007
IEEE
16 years 6 months ago
Perspectively Invariant Normal Features
We extend the successful 2D robust feature concept into the third dimension in that we produce a descriptor for a reconstructed 3D surface region. The descriptor is perspectively ...
Kevin Köser, Reinhard Koch
VLSID
2005
IEEE
157views VLSI» more  VLSID 2005»
16 years 4 months ago
Energy Efficient Hardware Synthesis of Polynomial Expressions
Polynomial expressions are used to approximate a wide variety of functions commonly found in signal processing and computer graphics applications. Computing these polynomial expre...
Anup Hosangadi, Farzan Fallah, Ryan Kastner
FCCM
2009
IEEE
169views VLSI» more  FCCM 2009»
15 years 10 months ago
RC-BLASTn: Implementation and Evaluation of the BLASTn Scan Function
BLASTn is a tool universally used by biologists to identify similarities between nucleotide based biological genome sequences. This report describes an FPGA based hardware impleme...
Siddhartha Datta, Parag Beeraka, Ron Sass