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ISPD
2003
ACM
110views Hardware» more  ISPD 2003»
15 years 9 months ago
Explicit gate delay model for timing evaluation
Delay evaluation is always a crucial concern in the VLSI design and it becomes increasingly more critical in the nowadays deep-submicron technology. To obtain an accurate delay va...
Muzhou Shao, Martin D. F. Wong, Huijing Cao, Youxi...
142
Voted
EMSOFT
2006
Springer
15 years 7 months ago
Modeling a system controller for timing analysis
Upper bounds on worst-case execution times, which are commonly called WCET, are a prerequisite for validating the temporal correctness of tasks in a real-time system. Due to the e...
Stephan Thesing
IMC
2010
ACM
15 years 1 months ago
Network tomography on correlated links
Network tomography establishes linear relationships between the characteristics of individual links and those of end-toend paths. It has been proved that these relationships can b...
Denisa Ghita, Katerina J. Argyraki, Patrick Thiran
186
Voted
HPDC
2012
IEEE
13 years 6 months ago
Dynamic adaptive virtual core mapping to improve power, energy, and performance in multi-socket multicores
Consider a multithreaded parallel application running inside a multicore virtual machine context that is itself hosted on a multi-socket multicore physical machine. How should the...
Chang Bae, Lei Xia, Peter A. Dinda, John R. Lange
ICCV
2003
IEEE
16 years 6 months ago
A Class of Photometric Invariants: Separating Material from Shape and Illumination
We derive a new class of photometric invariants that can be used for a variety of vision tasks including lighting invariant material segmentation, change detection and tracking, a...
Srinivasa G. Narasimhan, Visvanathan Ramesh, Shree...