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» Using FORAY Models to Enable MPSoC Memory Optimizations
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VEE
2009
ACM
146views Virtualization» more  VEE 2009»
14 years 3 months ago
Achieving 10 Gb/s using safe and transparent network interface virtualization
: © Achieving 10 Gb/s using Safe and Transparent Network Interface Virtualization Kaushik Kumar Ram, Jose Renato Santos, Yoshio Turner, Alan L. Cox, Scott Rixner HP Laboratories H...
Kaushik Kumar Ram, Jose Renato Santos, Yoshio Turn...
GECCO
2008
Springer
261views Optimization» more  GECCO 2008»
13 years 9 months ago
SSNNS -: a suite of tools to explore spiking neural networks
We are interested in engineering smart machines that enable backtracking of emergent behaviors. Our SSNNS simulator consists of hand-picked tools to explore spiking neural network...
Heike Sichtig, J. David Schaffer, Craig B. Laramee
ASPLOS
2008
ACM
13 years 10 months ago
Communication optimizations for global multi-threaded instruction scheduling
The recent shift in the industry towards chip multiprocessor (CMP) designs has brought the need for multi-threaded applications to mainstream computing. As observed in several lim...
Guilherme Ottoni, David I. August
EMSOFT
2007
Springer
14 years 2 months ago
Optimal task placement to improve cache performance
Most recent embedded systems use caches to improve their average performance. Current timing analyses are able to compute safe timing guarantees for these systems, if tasks are ru...
Gernot Gebhard, Sebastian Altmeyer
KDD
1997
ACM
143views Data Mining» more  KDD 1997»
14 years 21 days ago
Anytime Exploratory Data Analysis for Massive Data Sets
Exploratory data analysis is inherently an iterative, interactive endeavor. In the context of massive data sets, however, many current data analysis algorithms will not scale appr...
Padhraic Smyth, David Wolpert