643 search results - page 101 / 129 » Using Hardware Counters to Automatically Improve Memory Perf... |
ISCA
2010
IEEE
14 years 1 months ago
2010
IEEE
DRAM vendors have traditionally optimized the cost-perbit metric, often making design decisions that incur energy penalties. A prime example is the overfetch feature in DRAM, wher...
CGF
2010
13 years 9 months ago
2010
We propose a new framework design for exploiting multi-core architectures in the context of visualization dataflow systems. Recent hardware advancements have greatly increased the...
ACSD
2007
IEEE
14 years 3 months ago
2007
IEEE
Today there are many process mining techniques that allow for the automatic construction of process models based on event logs. Unlike synthesis techniques (e.g., based on regions...
ISHPC
2000
Springer
14 years 12 days ago
2000
Springer
This paper describes the implementation and evaluation of the OpenMP compiler designed for the Hitachi SR8000 Super Technical Server. The compiler performs parallelization for the ...
IPCCC
1999
IEEE
14 years 1 months ago
1999
IEEE
Many computer hardware and software architectures buffer data in memory to improve system performance. Volatile disk or file caches are sometimes used to delay the propagation of ...