643 search results - page 106 / 129 » Using Hardware Counters to Automatically Improve Memory Perf... |
HPCA
2007
IEEE
14 years 9 months ago
2007
IEEE
With the advent of ubiquitous multi-core architectures, a major challenge is to simplify parallel programming. One way to tame one of the main sources of programming complexity, n...
MICRO
1998
IEEE
14 years 1 months ago
1998
IEEE
We present an architecture that features dynamic multithreading execution of a single program. Threads are created automatically by hardware at procedure and loop boundaries and e...
RTCSA
2005
IEEE
14 years 2 months ago
2005
IEEE
Embedded systems are usually resource limited in terms of processing power, memory, and power consumption, thus embedded TCP/IP should be designed to make the best use of limited ...
CODES
2011
IEEE
12 years 8 months ago
2011
IEEE
Today, mobile smartphones are expected to be able to run the same complex, memory-intensive applications that were originally designed and coded for general-purpose processors. Ho...
ACMMSP
2004
ACM
14 years 2 months ago
2004
ACM
Irregular applications frequently exhibit poor performance on contemporary computer architectures, in large part because of their inefficient use of the memory hierarchy. Runtime ...