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ISCA
1995
IEEE
98views Hardware» more  ISCA 1995»
14 years 12 days ago
Instruction Fetching: Coping with Code Bloat
Previous research has shown that the SPEC benchmarks achieve low miss ratios in relatively small instruction caches. This paper presents evidence that current software-development...
Richard Uhlig, David Nagle, Trevor N. Mudge, Stuar...
ACMMSP
2006
ACM
226views Hardware» more  ACMMSP 2006»
14 years 18 days ago
Smarter garbage collection with simplifiers
We introduce a method for providing lightweight daemons, called simplifiers, that attach themselves to program data. If a data item has a simplifier, the simplifier may be run aut...
Melissa E. O'Neill, F. Warren Burton
MICRO
2008
IEEE
114views Hardware» more  MICRO 2008»
14 years 3 months ago
Toward a multicore architecture for real-time ray-tracing
Significant improvement to visual quality for real-time 3D graphics requires modeling of complex illumination effects like soft-shadows, reflections, and diffuse lighting intera...
Venkatraman Govindaraju, Peter Djeu, Karthikeyan S...
IPPS
2008
IEEE
14 years 3 months ago
Lattice Boltzmann simulation optimization on leading multicore platforms
We present an auto-tuning approach to optimize application performance on emerging multicore architectures. The methodology extends the idea of searchbased performance optimizatio...
Samuel Williams, Jonathan Carter, Leonid Oliker, J...
IEEEPACT
2006
IEEE
14 years 2 months ago
A two-phase escape analysis for parallel java programs
Thread escape analysis conservatively determines which objects may be accessed in more than one thread. Thread escape analysis is useful for a variety of purposes – finding rac...
Kyungwoo Lee, Samuel P. Midkiff