643 search results - page 123 / 129 » Using Hardware Counters to Automatically Improve Memory Perf... |
LCTRTS
2005
Springer
14 years 2 months ago
2005
Springer
Effective use of the memory hierarchy is critical for achieving high performance on embedded systems. We focus on the class of streaming applications, which is increasingly preval...
MICRO
2010
IEEE
13 years 6 months ago
2010
IEEE
The ever-increasing importance of main memory latency and bandwidth is pushing CMPs towards caches with higher capacity and associativity. Associativity is typically improved by in...
FMSD
2007
13 years 8 months ago
2007
Symbolic techniques based on Binary Decision Diagrams (BDDs) are widely employed for reasoning about temporal properties of hardware circuits and synchronous controllers. However, ...
HPDC
2006
IEEE
14 years 2 months ago
2006
IEEE
The aIOLi project aims at optimizing the I/O accesses within the cluster by providing a simple POSIX API, thus avoiding the constraints to use a dedicated parallel I/O library. Th...
ICCAD
2005
IEEE
14 years 5 months ago
2005
IEEE
: Double-Gate (DG) transistors have emerged as promising devices for nano-scale circuits due to their better scalability compared to bulk CMOS. Among the various types of DG device...