643 search results - page 68 / 129 » Using Hardware Counters to Automatically Improve Memory Perf... |
ASPLOS
2009
ACM
14 years 9 months ago
2009
ACM
A minimal, bounded hardware transactional memory implementation significantly improves synchronization performance when used in an operating system kernel. We add HTM to Linux 2.4...
ISCA
2009
IEEE
14 years 3 months ago
2009
IEEE
Industry has shifted towards multi-core designs as we have hit the memory and power walls. However, single thread performance remains of paramount importance since some applicatio...
DATE
2004
IEEE
14 years 14 days ago
2004
IEEE
This paper presents a new and simple prefetching mechanism to improve the memory performance of multimedia applications. This method adapts the memory access mechanism to the acce...
IEEEPACT
2005
IEEE
14 years 2 months ago
2005
IEEE
The continual demand for greater performance and growing concerns about the power consumption in highperformance microprocessors make the branch predictor a critical component of ...
CF
2009
ACM
14 years 3 months ago
2009
ACM
Chip Multiprocessor (CMP) memory systems suffer from the effects of destructive thread interference. This interference reduces performance predictability because it depends heavil...