643 search results - page 88 / 129 » Using Hardware Counters to Automatically Improve Memory Perf... |
CAV
2007
Springer
14 years 24 days ago
2007
Springer
In automatic software verification, we have observed a theoretical convergence of model checking and program analysis. In practice, however, model checkers are still mostly concern...
ISSS
2002
IEEE
14 years 1 months ago
2002
IEEE
Modeling for synthesis and modeling for simulation seem to be two competing goals in the context of C++-based modeling frameworks. One of the reasons is while most hardware system...
HPCA
2012
IEEE
12 years 4 months ago
2012
IEEE
The least recently used (LRU) replacement policy performs poorly in the last-level cache (LLC) because temporal locality of memory accesses is filtered by first and second level...
IPPS
2000
IEEE
14 years 1 months ago
2000
IEEE
Effective utilization of cache memories is a key factor in achieving high performance in computing the Discrete Fourier Transform (DFT). Most optimizationtechniques for computing ...
CC
2007
Springer
14 years 3 months ago
2007
Springer
As the amount of data used by programs increases due to the growth of hardware storage capacity and computing power, efficient memory usage becomes a key factor for performance. Si...