162 search results - page 19 / 33 » Using Hardware Performance Monitors to Isolate Memory Bottle... |
CODES
2005
IEEE
14 years 10 days ago
2005
IEEE
Design of programmable processors and embedded applications requires instruction-set simulators for early exploration and validation of candidate architectures. Interpretive simul...
DAMON
2009
Springer
14 years 1 months ago
2009
Springer
Database engines face growing scalability challenges as core counts exponentially increase each processor generation, and the efficiency of synchronization primitives used to prot...
MICRO
1998
IEEE
13 years 11 months ago
1998
IEEE
Load latency remains a significant bottleneck in dynamically scheduled pipelined processors. Load speculation techniques have been proposed to reduce this latency. Dependence Pred...
IPPS
2005
IEEE
14 years 9 days ago
2005
IEEE
We introduce a set of techniques to both measure and optimize memory access locality of Java applications running on cc-NUMA servers. These techniques work at the object level and...
TPCTC
2010
Springer
13 years 1 months ago
2010
Springer
Abstract. Event Processing (EP) systems are being progressively used in business critical applications in domains such as algorithmic trading, supply chain management, production m...