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ICCAD
2002
IEEE
142views Hardware» more  ICCAD 2002»
14 years 4 months ago
SAT and ATPG: Boolean engines for formal hardware verification
In this survey, we outline basic SAT- and ATPGprocedures as well as their applications in formal hardware verification. We attempt to give the reader a trace trough literature and...
Armin Biere, Wolfgang Kunz
IWPEC
2009
Springer
14 years 2 months ago
Boolean-Width of Graphs
Abstract. We introduce the graph parameter boolean-width, related to the number of different unions of neighborhoods across a cut of a graph. For many graph problems this number is...
Binh-Minh Bui-Xuan, Jan Arne Telle, Martin Vatshel...
IFIP
2001
Springer
13 years 12 months ago
Functional Test Generation using Constraint Logic Programming
— Semi-formal verification based on symbolic simulation offers a good compromise between formal model checking and numerical simulation. The generation of functional test vector...
Zhihong Zeng, Maciej J. Ciesielski, Bruno Rouzeyre
SCIA
2009
Springer
161views Image Analysis» more  SCIA 2009»
14 years 2 months ago
A Fast Optimization Method for Level Set Segmentation
Abstract. Level set methods are a popular way to solve the image segmentation problem in computer image analysis. A contour is implicitly represented by the zero level of a signed ...
Thord Andersson, Gunnar Läthén, Reiner...
SCALESPACE
2009
Springer
14 years 2 months ago
Momentum Based Optimization Methods for Level Set Segmentation
Abstract. Segmentation of images is often posed as a variational problem. As such, it is solved by formulating an energy functional depending on a contour and other image derived t...
Gunnar Läthén, Thord Andersson, Reiner...