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DATE
1999
IEEE
147views Hardware» more  DATE 1999»
13 years 12 months ago
Efficient BIST Hardware Insertion with Low Test Application Time for Synthesized Data Paths
In this paper, new and efficient BIST methodology and BIST hardware insertion algorithms are presented for RTL data paths obtained from high level synthesis. The methodology is ba...
Nicola Nicolici, Bashir M. Al-Hashimi
ICCD
2004
IEEE
106views Hardware» more  ICCD 2004»
14 years 4 months ago
Extending the Applicability of Parallel-Serial Scan Designs
Although scan-based designs are widely used in order to reduce the complexity of test generation, test application time and test data volume are substantially increased. We propos...
Baris Arslan, Ozgur Sinanoglu, Alex Orailoglu
HASE
2002
IEEE
14 years 15 days ago
An Approach to Specify and Test Component-Based Dependable Software
Components (in-house or pre-fabricated) are increasingly being used to reduce the cost of software development. Given that these components may not have not been developed with de...
Arshad Jhumka, Martin Hiller, Neeraj Suri
ISSTA
1998
ACM
13 years 11 months ago
Automatic Test Data Generation Using Constraint Solving Techniques
Automatic test data generation leads to identify input values on which a selected point in a procedure is executed. This paper introduces a new method for this problem based on co...
Arnaud Gotlieb, Bernard Botella, Michel Rueher
HASE
2007
IEEE
13 years 11 months ago
Model Validation using Automatically Generated Requirements-Based Tests
In current model-based development practice, validation that we are building a correct model is achieved by manually deriving requirements-based test cases for model testing. Mode...
Ajitha Rajan, Michael W. Whalen, Mats Per Erik Hei...