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SDL
2003
158views Hardware» more  SDL 2003»
13 years 9 months ago
Automatic Formal Model Generation and Analysis of SDL
A tool for verification of distributed systems defined using standard SDL-96 is described. The SDL description is automatically translated into a high-level Petri net model which...
Annikka Aalto, Nisse Husberg, Kimmo Varpaaniemi
NSDI
2004
13 years 9 months ago
Model Checking Large Network Protocol Implementations
Network protocols must work. The effects of protocol specification or implementation errors range from reduced performance, to security breaches, to bringing down entire networks....
Madanlal Musuvathi, Dawson R. Engler
UML
2005
Springer
14 years 1 months ago
Simplifying Autonomic Enterprise Java Bean Applications Via Model-Driven Development: A Case Study
Autonomic computer systems aim to reduce the configuration, operational, and maintenance costs of distributed applications by enabling them to self-manage, self-heal, self-optimiz...
Jules White, Douglas C. Schmidt, Aniruddha S. Gokh...
DATE
2009
IEEE
90views Hardware» more  DATE 2009»
14 years 2 months ago
Property analysis and design understanding
—Verification is a major issue in circuit and system design. Formal methods like bounded model checking (BMC) can guarantee a high quality of the verification. There are severa...
Ulrich Kühne, Daniel Große, Rolf Drechs...
CONCUR
1999
Springer
13 years 12 months ago
Partial Order Reduction for Model Checking of Timed Automata
Abstract. The paper presents a partial order reduction method applicable to networks of timed automata. The advantage of the method is that it reduces both the number of explored c...
Marius Minea