111 search results - page 17 / 23 » Using Multiple Memory Access Instructions for Reducing Code ... |
ICCAD
2007
IEEE
14 years 4 months ago
2007
IEEE
Several technologies with sub-lithographic features are targeting the fabrication of crossbar memories in which the nanowire decoder is playing a major role. In this paper, we sug...
BCS
2008
13 years 9 months ago
2008
This paper describes a customisable processor designed to accelerate execution of inductive logic programming, targeting advanced field-programmable gate array (FPGA) technology. ...
IWOMP
2007
Springer
14 years 1 months ago
2007
Springer
The Cell processor is a heterogeneous multi-core processor with one Power Processing Engine (PPE) core and eight Synergistic Processing Engine (SPE) cores. Each SPE has a directly...
ICS
2007
Tsinghua U.
14 years 1 months ago
2007
Tsinghua U.
Strassen’s matrix multiplication (MM) has benefits with respect to any (highly tuned) implementations of MM because Strassen’s reduces the total number of operations. Strasse...
CF
2011
ACM
12 years 7 months ago
2011
ACM
Dynamic Information Flow Tracking (DIFT) is a powerful technique that can protect unmodified binaries from a broad range of vulnerabilities such as buffer overflow and code inj...