466 search results - page 7 / 94 » Using Queue Time Predictions for Processor Allocation |
HPCA
1996
IEEE
13 years 11 months ago
1996
IEEE
We have investigated the register file requirements of dynamically scheduled processors using register renaming and dispatch queues running the SPEC92 benchmarks. We looked at pro...
ICS
2004
Tsinghua U.
14 years 27 days ago
2004
Tsinghua U.
In contemporary out-of-order superscalar design, high IPC is mainly achieved by exposing high instruction level parallelism (ILP). Scaling issue window size can certainly provide ...
PACS
2000
Springer
13 years 11 months ago
2000
Springer
Increasing power dissipation has become a major constraint for future performance gains in the design of microprocessors. In this paper, we present the circuit design of an issue ...
HIPC
2005
Springer
14 years 1 months ago
2005
Springer
Abstract. The proliferation of multiprocessor servers and multithreaded applications has increased the demand for high-performance synchronization. Traditional scheduler-based lock...
ISORC
2011
IEEE
12 years 11 months ago
2011
IEEE
—Static cache analysis for data allocated on the heap is practically impossible for standard data caches. We propose a distinct object cache for heap allocated data. The cache is...