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» Using SAT in QBF
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VLSID
2002
IEEE
177views VLSI» more  VLSID 2002»
14 years 8 months ago
RTL-Datapath Verification using Integer Linear Programming
Satisfiability of complex word-level formulas often arises as a problem in formal verification of hardware designs described at the register transfer level (RTL). Even though most...
Raik Brinkmann, Rolf Drechsler
GLVLSI
2008
IEEE
150views VLSI» more  GLVLSI 2008»
13 years 8 months ago
Using unsatisfiable cores to debug multiple design errors
Due to the increasing complexity of today's circuits a high degree of automation in the design process is mandatory. The detection of faults and design errors is supported qu...
André Sülflow, Görschwin Fey, Rod...
ICTAI
1997
IEEE
13 years 11 months ago
Prime Implicant Computation Using Satisfiability Algorithms
The computation of prime implicants has several and significant applications in different areas, including Automated Reasoning, Non-Monotonic Reasoning, Electronic Design Automati...
Vasco M. Manquinho, Paulo F. Flores, João P...
COMPGEOM
2006
ACM
14 years 1 months ago
Minimum weight triangulation is NP-hard
A triangulation of a planar point set S is a maximal plane straight-line graph with vertex set S. In the minimum weight triangulation (MWT) problem, we are looking for a triangula...
Wolfgang Mulzer, Günter Rote
CP
2000
Springer
14 years 5 days ago
Analysis of Random Noise and Random Walk Algorithms
Random Noise and Random Walk algorithms are local search strategies that have been used for the problem of satisfiability testing (SAT). We present a Markov-chain based analysis o...
Bhaskar Krishnamachari, Xi Xie, Bart Selman, Steph...