Sciweavers

99 search results - page 6 / 20
» Using Task Recomputation During Application Mapping in Paral...
Sort
View
CODES
2004
IEEE
13 years 11 months ago
Design and programming of embedded multiprocessors: an interface-centric approach
We present design technology for the structured design and programming of embedded multi-processor systems. It comprises a task-level interface that can be used both for developin...
Pieter van der Wolf, Erwin A. de Kock, Tomas Henri...
AIA
2006
13 years 9 months ago
FPGA-Targeted Neural Architecture for Embedded Alertness Detection
Several recent works have used neural networks to discriminate vigilance states in humans from electroencephalographic (EEG) signals. Our study aims at being more exhaustive. It t...
Bernard Girau, Khaled Ben Khalifa
VLSISP
2008
123views more  VLSISP 2008»
13 years 7 months ago
Implementation of a Coarse-Grained Reconfigurable Media Processor for AVC Decoder
ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications whic...
Bingfeng Mei, Bjorn De Sutter, Tom Vander Aa, M. W...
CF
2009
ACM
14 years 2 months ago
Mapping the LU decomposition on a many-core architecture: challenges and solutions
Recently, multi-core architectures with alternative memory subsystem designs have emerged. Instead of using hardwaremanaged cache hierarchies, they employ software-managed embedde...
Ioannis E. Venetis, Guang R. Gao
ASAP
1997
IEEE
144views Hardware» more  ASAP 1997»
13 years 11 months ago
Automatic data mapping of signal processing applications
This paper presents a technique to map automatically a complete digital signal processing (DSP) application onto a parallel machine with distributed memory. Unlike other applicati...
Corinne Ancourt, Denis Barthou, Christophe Guettie...