Sciweavers

73 search results - page 7 / 15
» Using Trace Scratchpads to Reduce Execution Times in Predict...
Sort
View
RTCSA
2009
IEEE
15 years 12 months ago
Branch Target Buffers: WCET Analysis Framework and Timing Predictability
—One step in the verification of hard real-time systems is to determine upper bounds on the worst-case execution times (WCET) of tasks. To obtain tight bounds, a WCET analysis h...
Daniel Grund, Jan Reineke, Gernot Gebhard
RTAS
2008
IEEE
15 years 11 months ago
Hybrid Timing Analysis of Modern Processor Pipelines via Hardware/Software Interactions
Embedded systems are often subject to constraints that require determinism to ensure that task deadlines are met. Such systems are referred to as real-time systems. Schedulability...
Sibin Mohan, Frank Mueller
RTCSA
2007
IEEE
15 years 11 months ago
A NOR Emulation Strategy over NAND Flash Memory
This work is motivated by a strong market demand in the replacement of NOR flash memory with NAND flash memory to cut down the cost in many embedded-system designs, such as mobi...
Jian-Hong Lin, Yuan-Hao Chang, Jen-Wei Hsieh, Tei-...
ECRTS
2010
IEEE
15 years 6 months ago
Making DRAM Refresh Predictable
Embedded control systems with hard real-time constraints require that deadlines are met at all times or the system may malfunction with potentially catastrophic consequences. Sched...
Balasubramanya Bhat, Frank Mueller
EUROPAR
1999
Springer
15 years 9 months ago
Multi-stage Cascaded Prediction
Two-level predictors deliver highly accurate conditional branch prediction, indirect branch target prediction and value prediction. Accurate prediction enables speculative executio...
Karel Driesen, Urs Hölzle