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» Using a SAT solver to generate checking sequences
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CSCLP
2004
Springer
14 years 26 days ago
Automatically Exploiting Symmetries in Constraint Programming
We introduce a framework for studying and solving a class of CSP formulations. The framework allows constraints to be expressed as linear and nonlinear equations, then compiles th...
Arathi Ramani, Igor L. Markov
FMCAD
2004
Springer
14 years 26 days ago
Increasing the Robustness of Bounded Model Checking by Computing Lower Bounds on the Reachable States
Most symbolic model checkers are based on either Binary Decision Diagrams (BDDs), which may grow exponentially large, or Satisfiability (SAT) solvers, whose time requirements rapi...
Mohammad Awedh, Fabio Somenzi
VLSID
2010
IEEE
155views VLSI» more  VLSID 2010»
13 years 5 months ago
Synchronized Generation of Directed Tests Using Satisfiability Solving
Directed test generation is important for the functional verification of complex system-on-chip designs. SAT based bounded model checking is promising for counterexample generatio...
Xiaoke Qin, Mingsong Chen, Prabhat Mishra
ASE
2004
148views more  ASE 2004»
13 years 7 months ago
TestEra: Specification-Based Testing of Java Programs Using SAT
TestEra is a framework for automated specification-based testing of Java programs. TestEra requires as input a Java method (in sourcecode or bytecode), a formal specification of th...
Sarfraz Khurshid, Darko Marinov
ISCIS
2005
Springer
14 years 1 months ago
Generalizing Redundancy Elimination in Checking Sequences
Abstract. Based on a distinguishing sequence for a Finite State Machine (FSM), an efficient checking sequence may be produced from the elements of a set Eα of α –sequences and ...
K. Tuncay Tekle, Hasan Ural, M. Cihan Yalcin, H&uu...