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» Using a SAT solver to generate checking sequences
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IFIP
2001
Springer
13 years 12 months ago
Functional Test Generation using Constraint Logic Programming
— Semi-formal verification based on symbolic simulation offers a good compromise between formal model checking and numerical simulation. The generation of functional test vector...
Zhihong Zeng, Maciej J. Ciesielski, Bruno Rouzeyre
SIGSOFT
2007
ACM
14 years 8 months ago
Finding bugs efficiently with a SAT solver
We present an approach for checking code against rich specifications, based on existing work that consists of encoding the program in a relational logic and using a constraint sol...
Julian Dolby, Mandana Vaziri, Frank Tip
ICCAD
2006
IEEE
128views Hardware» more  ICCAD 2006»
14 years 4 months ago
Improvements to combinational equivalence checking
The paper explores several ways to improve the speed and capacity of combinational equivalence checking based on Boolean satisfiability (SAT). State-of-the-art methods use simulat...
Alan Mishchenko, Satrajit Chatterjee, Robert K. Br...
DATE
2003
IEEE
100views Hardware» more  DATE 2003»
14 years 22 days ago
Improving SAT-Based Bounded Model Checking by Means of BDD-Based Approximate Traversals
: Binary Decision Diagrams (BDDs) have been widely used in synthesis and verification. Boolean Satisfiability (SAT) Solvers, on the other hand, have been gaining
Gianpiero Cabodi, Sergio Nocco, Stefano Quer
PRDC
2002
IEEE
14 years 11 days ago
Detecting Feature Interactions in Telecommunication Services with a SAT Solver
Feature interaction is a kind of inconsistent conflict between multiple communication services and considered an obstacle to developing reliable telephony systems. In this paper ...
Tatsuhiro Tsuchiya, Masahide Nakamura, Tohru Kikun...