262 search results - page 3 / 53 » Using dynamic cache management techniques to reduce energy i... |
167
Voted
CF
2007
ACM
2007
ACM
Adaptive VP decay: making value predictors leakage-efficient designs for high performance processors
15 years 9 months ago
Energy-efficient microprocessor designs are one of the major concerns in both high performance and embedded processor domains. Furthermore, as process technology advances toward d...
166
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CASES
2006
ACM
15 years 11 months ago
2006
ACM
In this paper, we propose a fully automatic dynamic scratchpad memory (SPM) management technique for instructions. Our technique loads required code segments into the SPM on deman...
136
Voted
IPPS
2005
IEEE
15 years 10 months ago
2005
IEEE
As energy consumption in high-performance systems has increased, thermal management has become a big challenge. Providing a cost-effective and detailed temperature sensing mechani...
114
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ISLPED
2009
ACM
15 years 11 months ago
2009
ACM
The design trend of caches in modern processors continues to increase their capacity with higher associativity to cope with large data footprint and take advantage of feature size...
178
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TCAD
2008
15 years 5 months ago
2008
Abstract--Thermal issues are fast becoming major design constraints in high-performance systems. Temperature variations adversely affect system reliability and prompt worst-case de...