239 search results - page 47 / 48 » Using hardware methods to improve time-predictable performan... |
124
Voted
IEEEPACT
2008
IEEE
15 years 9 months ago
2008
IEEE
This paper presents the Distributed Cooperative Caching, a scalable and energy-efficient scheme to manage chip multiprocessor (CMP) cache resources. The proposed configuration is...
130
Voted
MICRO
2009
IEEE
15 years 9 months ago
2009
IEEE
High assurance systems such as those found in aircraft controls and the financial industry are often required to handle a mix of tasks where some are niceties (such as the contro...
153
Voted
TCAD
2008
15 years 2 months ago
2008
Three-dimensional integration has the potential to improve the communication latency and integration density of chip-level multiprocessors (CMPs). However, the stacked highpower de...
145
Voted
AFRICACRYPT
2009
Springer
15 years 9 months ago
2009
Springer
We present the first simple power analysis (SPA) of software implementations of KeeLoq. Our attack drastically reduces the efforts required for a complete break of remote keyless...
129
Voted
CCS
2010
ACM
15 years 2 months ago
2010
ACM
Network-based Intrusion Detection Systems (IDSs) such as Snort or Bro that have to analyze the packet payload for all the received data show severe performance problems if used in...