Sciweavers

285 search results - page 11 / 57
» Using the Compiler to Improve Cache Replacement Decisions
Sort
View
ISCA
2006
IEEE
182views Hardware» more  ISCA 2006»
14 years 1 months ago
Cooperative Caching for Chip Multiprocessors
This paper presents CMP Cooperative Caching, a unified framework to manage a CMP’s aggregate on-chip cache resources. Cooperative caching combines the strengths of private and ...
Jichuan Chang, Gurindar S. Sohi
ECBS
2006
IEEE
211views Hardware» more  ECBS 2006»
14 years 1 months ago
Modified Pseudo LRU Replacement Algorithm
Although the LRU replacement algorithm has been widely used in cache memory management, it is wellknown for its inability to be easily implemented in hardware. Most of primary cac...
Hassan Ghasemzadeh, Sepideh Sepideh Mazrouee, Moha...
CP
2008
Springer
13 years 9 months ago
Approximate Compilation of Constraints into Multivalued Decision Diagrams
We present an incremental refinement algorithm for approximate compilation of constraint satisfaction models into multivalued decision diagrams (MDDs). The algorithm uses a vertex ...
Tarik Hadzic, John N. Hooker, Barry O'Sullivan, Pe...
ACMMSP
2004
ACM
92views Hardware» more  ACMMSP 2004»
14 years 1 months ago
Instruction combining for coalescing memory accesses using global code motion
Instruction combining is an optimization to replace a sequence of instructions with a more efficient instruction yielding the same result in a fewer machine cycles. When we use it...
Motohiro Kawahito, Hideaki Komatsu, Toshio Nakatan...
HPCA
2012
IEEE
12 years 3 months ago
Decoupled dynamic cache segmentation
The least recently used (LRU) replacement policy performs poorly in the last-level cache (LLC) because temporal locality of memory accesses is filtered by first and second level...
Samira Manabi Khan, Zhe Wang, Daniel A. Jimé...