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» Using the Compiler to Improve Cache Replacement Decisions
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IEEEPACT
2005
IEEE
14 years 1 months ago
Design and Implementation of a Compiler Framework for Helper Threading on Multi-core Processors
Helper threading is a technique that utilizes a second core or logical processor in a multi-threaded system to improve the performance of the main thread. A helper thread executes...
Yonghong Song, Spiros Kalogeropulos, Partha Tiruma...
GLVLSI
2008
IEEE
112views VLSI» more  GLVLSI 2008»
14 years 2 months ago
Instruction cache leakage reduction by changing register operands and using asymmetric sram cells
Share of leakage in cache memories is increasing with technology scaling. Studies show that most stored bits in instruction caches are zero, and hence, asymmetric SRAM cells which...
Maziar Goudarzi, Tohru Ishihara
JSAC
2007
116views more  JSAC 2007»
13 years 7 months ago
GroCoca: group-based peer-to-peer cooperative caching in mobile environment
— In a mobile cooperative caching environment, we observe the need for cooperating peers to cache useful data items together, so as to improve cache hit from peers. This could be...
Chi-Yin Chow, Hong Va Leong, Alvin T. S. Chan
USENIX
2001
13 years 9 months ago
Page Replacement in Linux 2.4 Memory Management
While the virtual memory management in Linux 2.2 has decent performance for many workloads, it suffers from a number of problems. The first part of this paper contains a descripti...
Rik van Riel
KAIS
2002
95views more  KAIS 2002»
13 years 7 months ago
Enhanced Proxy Caching with Content Management
In this paper, we propose a novel approach to enhancing web proxy caching, an approach that integrates content management with performance tuning techniques. We first develop a hie...
Kai Cheng, Yahiko Kambayashi