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PDP
2010
IEEE
13 years 12 months ago
Energy-Efficient Hardware Prefetching for CMPs Using Heterogeneous Interconnects
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...
Antonio Flores, Juan L. Aragón, Manuel E. A...
BMCBI
2010
116views more  BMCBI 2010»
13 years 7 months ago
permGPU: Using graphics processing units in RNA microarray association studies
Background: Many analyses of microarray association studies involve permutation, bootstrap resampling and crossvalidation, that are ideally formulated as embarrassingly parallel c...
Ivo D. Shterev, Sin-Ho Jung, Stephen L. George, Ko...
JNCA
2007
80views more  JNCA 2007»
13 years 7 months ago
High-speed routers design using data stream distributor unit
As the line rates standards are changing frequently to provide higher bit rates, the routers design has become very challenging due to the need for new wire-speed router’s netwo...
Ali El Kateeb
SIGCSE
2006
ACM
362views Education» more  SIGCSE 2006»
14 years 1 months ago
Chirp on crickets: teaching compilers using an embedded robot controller
Traditionally, the topics of compiler construction and language processing have been taught as an elective course in Computer Science curricula. As such, students may graduate wit...
Li Xu, Fred G. Martin
USENIX
1994
13 years 9 months ago
Reducing File System Latency using a Predictive Approach
Despite impressive advances in file system throughput resulting from technologies such as high-bandwidth networks and disk arrays, file system latency has not improved and in many...
Jim Griffioen, Randy Appleton