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ISCAS
2002
IEEE
124views Hardware» more  ISCAS 2002»
15 years 9 months ago
Performance optimization of multiple memory architectures for DSP
Multiple memory module architecture offers higher performance by providing potentially doubled memory bandwidth. Two key problems in gaining high performance in this kind of archi...
Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha
CCGRID
2002
IEEE
15 years 9 months ago
User-Centric Performance Analysis of Market-Based Cluster Batch Schedulers
This paper presents a performance analysis of marketbased batch schedulers for clusters of workstations. In contrast to previous work, we use user-centric performance metrics as t...
Brent N. Chun, David E. Culler
CHI
2004
ACM
16 years 4 months ago
Performance of menu-augmented soft keyboards
We report results on the performance of the combination of soft keyboards and marking menus. A model of expert user performance indicated an 11 - 37% (depending on the keyboard la...
Poika Isokoski
INFOCOM
2010
IEEE
15 years 2 months ago
Approximate Models for General Cache Networks
Abstract—Many systems employ caches to improve performance. While isolated caches have been studied in-depth, multicache systems are not well understood, especially in networks w...
Elisha J. Rosensweig, James F. Kurose, Donald F. T...
PDCAT
2007
Springer
15 years 10 months ago
Realistic Evaluation of Interconnection Network Performance at High Loads
Any simulation-based evaluation of an interconnection network proposal requires a good characterization of the workload. Synthetic traffic patterns based on independent traffic so...
Francisco Javier Ridruejo Perez, Javier Navaridas,...