Testing of VLSI circuits can cause generation of excessive heat which can damage the chips under test. In the random testing environment, high-performance CMOS circuits consume sig...
Artem Sokolov, Alodeep Sanyal, L. Darrell Whitley,...
We present a new approach that is able to produce an increased fault tolerance in bio-inspired electronic circuits. To this end, we designed hardwarefriendly genetic regulatory net...
Concerned by the wall that Moore’s Law is expected to hit in the next decade, the integrated circuit community is turning to emerging nanotechnologies for continued device impro...
This paper analyses alternatives for the parallelization of the Simulated Annealing algorithm when applied to the placement of modules in a VLSI circuit considering the use of PVM...
This paper deals with the evolutionary design of programs (constructors) that are able to create (n+2)-input circuits from n-input circuits. The growing circuits are composed of p...