92 search results - page 6 / 19 » VLSI architecture based on packet data transfer scheme and i... |
GLVLSI
2000
IEEE
13 years 12 months ago
2000
IEEE
System-level power exploration requires tools for estimation of the overall power consumed by a system, as well as a detailed breakdown of the consumption of its main functional b...
IJNSEC
2007
13 years 7 months ago
2007
In this paper a secure error-signalling scheme for packetswitched network architectures is presented. Current solutions are based on the Internet Control Message Protocol to deliv...
MOBISYS
2007
ACM
14 years 7 months ago
2007
ACM
Ubiquitous connectivity on mobile devices will enable numerous new applications in healthcare and multimedia. We set out to check how close we are towards ubiquitous connectivity ...
VLSID
2007
IEEE
14 years 7 months ago
2007
IEEE
This paper proposes a data encoder to reduce switched capacitance on system bus. Our method focuses on transferring raw video data (pixels) between off-chip memory and on-chip mem...
WMPI
2004
ACM
14 years 26 days ago
2004
ACM
Abstract. In this paper, we propose a processor architecture with programmable on-chip memory for a high-performance SMP (symmetric multi-processor) node named SCIMA-SMP (Software ...