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» Validating High-Level Synthesis
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ASPDAC
2006
ACM
114views Hardware» more  ASPDAC 2006»
14 years 4 months ago
High level equivalence symmetric input identification
Symmetric input identification is an important technique in logic synthesis. Previous approaches deal with this problem by building BDDs and developing algorithms to determine symm...
Ming-Hong Su, Chun-Yao Wang
CARDIS
2004
Springer
150views Hardware» more  CARDIS 2004»
14 years 4 months ago
Enforcing High-Level Security Properties for Applets
Smart card applications often handle privacy-sensitive information, and therefore must obey certain security policies. Typically, such policies are described as high-level security...
Mariela Pavlova, Gilles Barthe, Lilian Burdy, Mari...
IWUC
2004
14 years 9 days ago
On Uncertainty in Context-Aware Computing: Appealing to High-Level and Same-Level Context for Low-Level Context Verification
There is an inherent chasm between the real-world and the world that can be perceived by computer systems, yielding uncertainty and ambiguity in system perceived context, with cons...
Amir Padovitz, Seng Wai Loke, Arkady B. Zaslavsky
MEMOCODE
2007
IEEE
14 years 5 months ago
From WiFi to WiMAX: Techniques for High-Level IP Reuse across Different OFDM Protocols
Orthogonal Frequency-Division Multiplexing (OFDM) has become the preferred modulation scheme for both broadband and high bitrate digital wireless protocols because of its spectral...
Man Cheuk Ng, Muralidaran Vijayaraghavan, Nirav Da...
ICCAD
2000
IEEE
159views Hardware» more  ICCAD 2000»
14 years 3 months ago
ACTIF: A High-Level Power Estimation Tool for Analog Continuous-Time-Filters
A tool is presented that gives a high-level estimation of the power consumed by an analog continuous-time OTA-C filter when given only high-level input parameters such as dynamic ...
Erik Lauwers, Georges G. E. Gielen