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» Validating High-Level Synthesis
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ASPDAC
2008
ACM
104views Hardware» more  ASPDAC 2008»
14 years 1 months ago
Variability-driven module selection with joint design time optimization and post-silicon tuning
Abstract-- Increasing delay and power variation are significant challenges to the designers as technology scales to the deep sub-micron (DSM) regime. Traditional module selection t...
Feng Wang 0004, Xiaoxia Wu, Yuan Xie
BMVC
2002
14 years 1 months ago
Novel View Specification and Synthesis
Given a set of real images, Novel View Synthesis (NVS) aims to produce views of a scene that would correspond to that of a virtual camera. There exist many approaches to solving t...
Keith Connor, Ian D. Reid
DAC
2005
ACM
14 years 12 months ago
Simulation based deadlock analysis for system level designs
In the design of highly complex, heterogeneous, and concurrent systems, deadlock detection and resolution remains an important issue. In this paper, we systematically analyze the ...
Xi Chen, Abhijit Davare, Harry Hsieh, Alberto L. S...
WSC
2008
14 years 1 months ago
Architecture for modeling, simulation, and execution of PLC based manufacturing system
In this paper, we propose an integrated architecture for modeling, simulation, and execution of PLC (Programmable Logic Controller) based manufacturing system. The main objective ...
Devinder Thapa, Chang Mok Park, Kwan Hee Han, Sang...
NIPS
2004
14 years 10 days ago
A Three Tiered Approach for Articulated Object Action Modeling and Recognition
Visual action recognition is an important problem in computer vision. In this paper, we propose a new method to probabilistically model and recognize actions of articulated object...
Le Lu, Gregory D. Hager, Laurent Younes