428 search results - page 51 / 86 » Validating High-Level Synthesis |
ICCAD
1997
IEEE
14 years 3 months ago
1997
IEEE
Asynchronous circuits operate correctly only under timing assumptions. Hence testing those circuits for delay faults is crucial. This paper describes a three-step method to detect...
FMCAD
2007
Springer
14 years 2 months ago
2007
Springer
Modeling hardware through atomic guard/action transitions with interleaving semantics is popular, owing to the conceptual clarity of modeling and verifying the high level behavior ...
COST
2008
Springer
14 years 24 days ago
2008
Springer
The quality of static phones (e.g. vowels, fricatives, nasals, laterals) generated by articulatory speech synthesizers has reached a high level in the last years. Our goal is to ex...
WETICE
2003
IEEE
14 years 4 months ago
2003
IEEE
The coordination of concurrent activities in collaborative environments is a very important and difficult task. Many approaches for the construction of large-scale flexible grou...
VLSID
1999
IEEE
14 years 3 months ago
1999
IEEE
The design and synthesis of asynchronous circuits is gaining importance in both the industrial and academic worlds. Timed circuits are a class of asynchronous circuits that incorp...