41 search results - page 4 / 9 » Validating Register Allocation and Spilling |
LCTRTS
2007
Springer
14 years 1 months ago
2007
Springer
The run-time performance of VLIW (very long instruction word) microprocessors depends heavily on the effectiveness of its associated optimizing compiler. Typical VLIW compiler pha...
HIPC
2005
Springer
14 years 29 days ago
2005
Springer
Abstract. Linear scan register allocation is an attractive register allocation algorithm because of its simplicity and fast running time. However, it is generally felt that linear ...
CC
2009
Springer
14 years 8 months ago
2009
Springer
form uses a notational abstractions called -functions. These instructions have no analogous in actual machine instruction sets, and they must be replaced by ordinary instructions ...
CC
2007
Springer
14 years 1 months ago
2007
Springer
In this paper, we extend past work on Linear Scan register allocation, and propose two Extended Linear Scan (ELS) algorithms that retain the compiletime efficiency of past Linear ...
ICCAD
2007
IEEE
2007
IEEE
Optimal polynomial-time interprocedural register allocation for high-level synthesis and ASIP design
14 years 4 months ago
—Register allocation, in high-level synthesis and ASIP design, is the process of determining the number of registers to include in the resulting circuit or processor. The goal is...