Today’s shared-memory parallel programming models are complex and error-prone. While many parallel programs are intended to be deterministic, unanticipated thread interleavings ...
Robert L. Bocchino Jr., Vikram S. Adve, Danny Dig,...
This paper examines the effect of technology scaling and microarchitectural trends on the rate of soft errors in CMOS memory and logic circuits. We describe and validate an end-to...
Premkishore Shivakumar, Michael Kistler, Stephen W...
Internet routing events are known to introduce severe disruption to applications. So far effective diagnosis of routing events has relied on proprietary ISP data feeds, resulting ...
Abstract. In multi-robot applications, such as foraging or collection tasks, interference, which results from competition for space between spatially extended robots, can significa...
We present a framework for modeling the spread of pathogens throughout a population and generating policies that minimize the impact of those pathogens on the population. This fra...