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Variation tolerant logic mapping for crossbar array nano arc...
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ASPDAC
2010
ACM
117
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Hardware
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Variation tolerant logic mapping for crossbar array nano architectures
15 years 1 months ago
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Cihan Tunc, Mehdi Baradaran Tahoori
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124
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DSN
2007
IEEE
145
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Computer Networks
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DSN 2007
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Fault Tolerant Approaches to Nanoelectronic Programmable Logic Arrays
15 years 9 months ago
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Programmable logic arrays (PLA), which can implement arbitrary logic functions in a two-level logic form, are promising as platforms for nanoelectronic logic due to their highly r...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
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