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» Variation-Aware Fault Modeling
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DFT
1999
IEEE
75views VLSI» more  DFT 1999»
15 years 8 months ago
A Module Diagnosis and Design-for-Debug Methodology Based on Hierarchical Test Paths
Fault identification capabilities are becoming increasingly important in modern designs, not only in support of design debugging methodologies, but also for the purpose of process...
Yiorgos Makris, Alex Orailoglu
ITC
1999
IEEE
98views Hardware» more  ITC 1999»
15 years 8 months ago
A design diversity metric and reliability analysis for redundant systems
Design diversity has long been used to protect redundant systems against common-mode failures. The conventional notion of diversity relies on "independent" generation of...
Subhasish Mitra, Nirmal R. Saxena, Edward J. McClu...
IPPS
1998
IEEE
15 years 8 months ago
Migration and Rollback Transparency for Arbitrary Distributed Applications in Workstation Clusters
Programmers and users of compute intensive scientific applications often do not want to (or even cannot) code load balancing and fault tolerance into their programs. The PBEAM syst...
Stefan Petri, Matthias Bolz, Horst Langendörf...
ICSE
1998
IEEE-ACM
15 years 8 months ago
What You See Is What You Test: A Methodology for Testing Form-Based Visual Programs
Form-based visual programming languages, which include commercial spreadsheets and various research systems, have had a substantial impact on end-user computing. Research shows, h...
Gregg Rothermel, Lixin Li, Christopher DuPuis, Mar...
VLSID
1997
IEEE
98views VLSI» more  VLSID 1997»
15 years 8 months ago
Synthesis for Logical Initializability of Synchronous Finite State Machines
—Logical initializability is the property of a gate-level circuit whereby it can be driven to a unique start state when simulated by a three-valued (0, 1, ) simulator. In practic...
Montek Singh, Steven M. Nowick