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» Variation-aware routing for FPGAs
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FPL
2001
Springer
115views Hardware» more  FPL 2001»
13 years 12 months ago
Placing, Routing, and Editing Virtual FPGAs
This paper presents the benefits of using a generic FPGA tool set developed at the university of Brest for programming virtual FPGA structures. From a high level FPGA description,...
Loïc Lagadec, Dominique Lavenier, Erwan Fabia...
IPPS
2006
IEEE
14 years 1 months ago
Placement and routing of Boolean functions in constrained FPGAs using a distributed genetic algorithm and local search
In this work we present a system for implementing the placement and routing stages in the FPGA cycle of design, into the physical design stage. We start with the ISCAS benchmarks,...
Manuel Rubio del Solar, Juan Manuel Sánchez...
HOST
2008
IEEE
14 years 1 months ago
Place-and-Route Impact on the Security of DPL Designs in FPGAs
—Straightforward implementations of cryptographic algorithms are known to be vulnerable to attacks aimed not at the mathematical structure of the cipher but rather at the weak po...
Sylvain Guilley, Sumanta Chaudhuri, Jean-Luc Dange...
ICES
2003
Springer
93views Hardware» more  ICES 2003»
14 years 20 days ago
A Genetic Representation for Evolutionary Fault Recovery in Virtex FPGAs
Most evolutionary approaches to fault recovery in FPGAs focus on evolving alternative logic configurations as opposed to evolving the intra-cell routing. Since the majority of tra...
Jason D. Lohn, Gregory V. Larchev, Ronald F. DeMar...
EURODAC
1995
IEEE
133views VHDL» more  EURODAC 1995»
13 years 11 months ago
Tree restructuring approach to mapping problem in cellular-architecture FPGAs
A new technique for mapping combinational circuits to Fine-Grain Cellular-Architecture FPGAs is presented. The proposed tree restructuring algorithm preserves local connectivity a...
Naveen Ramineni, Malgorzata Chrzanowska-Jeske, Nav...