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ASPDAC
2005
ACM
119views Hardware» more  ASPDAC 2005»
13 years 11 months ago
CMP aware shuttle mask floorplanning
- By putting different chips on the same mask, shuttle mask (or multiple project wafer) provides an economical solution for low volume designs and design prototypes to share the ri...
Gang Xu, Ruiqi Tian, David Z. Pan, Martin D. F. Wo...
SIAMCO
2002
78views more  SIAMCO 2002»
13 years 8 months ago
Strong Optimality for a Bang-Bang Trajectory
In this paper we give sufficient conditions for a bang-bang regular extremal to be a strong local optimum for a control problem in the Mayer form; strong means that we consider the...
Andrei A. Agrachev, Gianna Stefani, PierLuigi Zezz...
TCAD
2002
91views more  TCAD 2002»
13 years 8 months ago
Retiming and clock scheduling for digital circuit optimization
Abstract--This paper investigates the application of simultaneous retiming and clock scheduling for optimizing synchronous circuits under setup and hold constraints. Two optimizati...
Xun Liu, Marios C. Papaefthymiou, Eby G. Friedman
MICCAI
2010
Springer
13 years 7 months ago
Nonlinear Embedding towards Articulated Spine Shape Inference Using Higher-Order MRFs
In this paper we introduce a novel approach for inferring articulated spine models from images. A low-dimensional manifold embedding is created from a training set of prior mesh mo...
Samuel Kadoury, Nikos Paragios
ICCAD
2009
IEEE
144views Hardware» more  ICCAD 2009»
13 years 6 months ago
Virtual probe: A statistically optimal framework for minimum-cost silicon characterization of nanoscale integrated circuits
In this paper, we propose a new technique, referred to as virtual probe (VP), to efficiently measure, characterize and monitor both inter-die and spatially-correlated intra-die va...
Xin Li, Rob A. Rutenbar, R. D. (Shawn) Blanton