61 search results - page 2 / 13 » Verification Environment for a SCMP Architecture |
FLAIRS
2000
13 years 8 months ago
2000
The paper presents a survey of the VSE system, a kind of CASE-tool for formal software development. It is a summary of a tutorial presentation describing methodology, formalisms, ...
DAC
1999
ACM
14 years 8 months ago
1999
ACM
CBSE
2006
Springer
13 years 11 months ago
2006
Springer
We present a novel approach which facilitates formal verification of component-based software application families using model checking. This approach enables effective composition...
EUROMED
2010
13 years 5 months ago
2010
Abstract. We explain our approach for verifying the accuracy of 3D CG manual modeling of the Citadel of Bam, which is an architectural heritage site destroyed by an earthquake in 2...
DAC
2005
ACM
13 years 9 months ago
2005
ACM
The purpose of this paper is to present the required tools for the development, testing and verification of DSP software in Matlab. The paper motivates a DSP Simulator concept tha...