169 search results - page 22 / 34 » Verification of Dynamically Reconfigurable Logic |
ICAS
2006
IEEE
14 years 1 months ago
2006
IEEE
— We target the problem of predicting resource usage in situations where the modeling data is scarce, non-stationary, or expensive to obtain. This scenario occurs frequently in c...
FPL
2006
Springer
13 years 11 months ago
2006
Springer
Given large circuit sizes, high clock frequencies, and possibly extreme operating environments, Field Programmable Gate Arrays (FPGAs) are capable of heating beyond their designed...
CSREAESA
2009
13 years 8 months ago
2009
A Built-In Self-Test (BIST) approach is presented for the Internal Configuration Access Port (ICAP) and Frame Error Correcting Code (ECC) logic cores embedded in Xilinx Virtex-4 an...
ESOP
2010
Springer
14 years 5 months ago
2010
Springer
Abstract. Embedded information assurance applications that are critical to national and international infrastructures, must often adhere to certification regimes that require infor...
DATE
2010
IEEE
14 years 24 days ago
2010
IEEE
—In a conventional SoC designs, on-chip memories occupy more than the 50% of the total die area. 3D technology enables the distribution of logic and memories on separate stacked ...