169 search results - page 29 / 34 » Verification of Dynamically Reconfigurable Logic |
TCAD
2008
13 years 7 months ago
2008
Functional correctness is a vital attribute of any hardware design. Unfortunately, due to extremely complex architectures, widespread components, such as microprocessors, are often...
MICRO
1999
IEEE
13 years 12 months ago
1999
IEEE
Building a high-performance microprocessor presents many reliability challenges. Designers must verify the correctness of large complex systems and construct implementations that ...
CADE
2007
Springer
14 years 8 months ago
2007
Springer
Manna and Pnueli have extensively shown how a mixture of first-order logic (FOL) and discrete Linear time Temporal Logic (LTL) is sufficient to precisely state verification problem...
JUCS
2008
13 years 7 months ago
2008
: This paper gives a definition of ASM refinement suitable for the verification that a protocol implements atomic transactions. We used this definition as the basis of the formal v...
CADE
2010
Springer
13 years 8 months ago
2010
Springer
Automated software verification and path-sensitive program analysis require the ability to distinguish executable program paths from those that are infeasible. To achieve this, pro...