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» Verification of Dynamically Reconfigurable Logic
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DAC
2005
ACM
13 years 9 months ago
Dynamic reconfiguration with binary translation: breaking the ILP barrier with software compatibility
In this paper we present the impact of dynamically translating any sequence of instructions into combinational logic. The proposed approach combines a reconfigurable architecture ...
Antonio Carlos Schneider Beck, Luigi Carro
SBCCI
2006
ACM
139views VLSI» more  SBCCI 2006»
14 years 1 months ago
Infrastructure for dynamic reconfigurable systems: choices and trade-offs
Platform-based design is a method to implement complex SoCs, avoiding chip design from scratch. A promising evolution of platform-based design are MPSoC. Such generic architecture...
Leandro Möller, Rafael Soares, Ewerson Carval...
CODES
2002
IEEE
14 years 19 days ago
Dynamic run-time HW/SW scheduling techniques for reconfigurable architectures
Dynamic run-time scheduling in System-on-Chip platforms has become recently an active area of research because of the performance and power requirements of new applications. Moreo...
Juanjo Noguera, Rosa M. Badia
ICASSP
2007
IEEE
14 years 2 months ago
Adaptive Weight Estimation in Multi-Biometric Verification using Fuzzy Logic Decision Fusion
This paper describes a multi-biometric verification system that is fully adaptive to variability in data acquisition using fuzzy logic decision fusion. The system uses fuzzy logic...
Henry Pak-Sum Hui, Helen M. Meng, Man-Wai Mak
IEEEPACT
2007
IEEE
14 years 2 months ago
Error Detection Using Dynamic Dataflow Verification
Continued scaling of CMOS technology to smaller transistor sizes makes modern processors more susceptible to both transient and permanent hardware faults. Circuitlevel techniques ...
Albert Meixner, Daniel J. Sorin