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WSC
1998
13 years 11 months ago
Validation and Verification of the Simulation Model of a Photolithography Process in Semiconductor Manufacturing
Simulation modeling provides an effective and powerful approach for capturing and analyzing complex manufacturing systems. More and more decisions are based on computer generated ...
Nirupama Nayani, Mansooreh Mollaghasemi
ENTCS
2008
139views more  ENTCS 2008»
13 years 10 months ago
Pervasive Compiler Verification - From Verified Programs to Verified Systems
We report in this paper on the formal verification of a simple compiler for the C-like programming language C0. The compiler correctness proof meets the special requirements of pe...
Dirk Leinenbach, Elena Petrova
ICPR
2010
IEEE
13 years 8 months ago
Verification Under Increasing Dimensionality
Verification decisions are often based on second order statistics estimated from a set of samples. Ongoing growth of computational resources allows for considering more and more fe...
Anne Hendrikse, Raymond N. J. Veldhuis, Luuk J. Sp...
CORR
2011
Springer
216views Education» more  CORR 2011»
13 years 5 months ago
Approaches to Formal Verification of Security Protocols
— In recent times, many protocols have been proposed to provide security for various information and communication systems. Such protocols must be tested for their functional cor...
Suvansh Lal, Mohit Jain, Vikrant Chaplot
POPL
2009
ACM
14 years 10 months ago
A calculus of atomic actions
We present a proof calculus and method for the static verification of assertions and procedure specifications in shared-memory concurrent programs. The key idea in our approach is...
Tayfun Elmas, Shaz Qadeer, Serdar Tasiran