Methods of formal description and verification represent a viable way for achieving fundamentally bug-free software. However, in reality only a small subset of the existing operati...
Resource limited DRE (Distributed Real-time Embedded) systems can benefit greatly from dynamic adaptation of system parameters. We propose a novel approach that employs iterative t...
Minyoung Kim, Mark-Oliver Stehr, Carolyn L. Talcot...
Model checking techniques have traditionally dealt with temporal logic languages and automata interpreted over -words, i.e., infinite in the future but finite in the past. However...
Matteo Pradella, Angelo Morzenti, Pierluigi San Pi...
This paper presents an effective approach to formally verify SystemC designs. The approach translates SystemC models into a Petri-Net based representation. The Petri-net model is ...
Probabilistic timed automata (PTAs) are used for formal modelling and verification of systems with probabilistic, nondeterministic and real-time behaviour. For non-probabilistic ti...