304 search results - page 21 / 61 » Verification of Timed Systems Using POSETs |
IJCAI
2003
13 years 8 months ago
2003
This paper addresses the formal verification of diagnosis systems. We tackle the problem of diagnosability: given a partially observable dynamic system, and a diagnosis system obs...
CORR
2011
Springer
13 years 2 months ago
2011
Springer
— In recent times, many protocols have been proposed to provide security for various information and communication systems. Such protocols must be tested for their functional cor...
DFG
2004
Springer
13 years 11 months ago
2004
Springer
Programmable Logic Controllers (PLC) are widespread in the manufacturing and processing industries to realize sequential procedures and to avoid safety-critical states. For the spe...
DSD
2005
IEEE
14 years 1 months ago
2005
IEEE
This paper proposes a validation approach, based on simulation, which addresses problems related to both state space explosion of formal methods and low coverage of informal metho...
ASPDAC
2007
ACM
13 years 11 months ago
2007
ACM
This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixedsignal (AMS) circuits. The systems are modeled in VHDL-AMS, a hardware des...