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» Verification of Timed Systems Using POSETs
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DAC
2003
ACM
14 years 8 months ago
Automatic trace analysis for logic of constraints
Verification of system designs continues to be a major challenge today. Simulation remains the primary tool for making sure that implementations perform as they should. We present...
Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Wat...
CASES
2010
ACM
13 years 5 months ago
Real-time unobtrusive program execution trace compression using branch predictor events
Unobtrusive capturing of program execution traces in real-time is crucial in debugging cyber-physical systems. However, tracing even limited program segments is often cost-prohibi...
Vladimir Uzelac, Aleksandar Milenkovic, Martin Bur...
FORMATS
2010
Springer
13 years 5 months ago
Robust Satisfaction of Temporal Logic over Real-Valued Signals
Abstract. We consider temporal logic formulae specifying constraints in continuous time and space on the behaviors of continuous and hybrid dynamical system admitting uncertain par...
Alexandre Donzé, Oded Maler
SIGSOFT
2005
ACM
14 years 8 months ago
Fluent temporal logic for discrete-time event-based models
Fluent model checking is an automated technique for verifying that an event-based operational model satisfies some state-based declarative properties. The link between the event-b...
Emmanuel Letier, Jeff Kramer, Jeff Magee, Sebasti&...
ATAL
2006
Springer
13 years 11 months ago
Verifying space and time requirements for resource-bounded agents
The effective reasoning capability of an agent can be defined as its capability to infer, within a given space and time bound, facts that are logical consequences of its knowledge...
Natasha Alechina, Mark Jago, Piergiorgio Bertoli, ...