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ISSS
2002
IEEE
125views Hardware» more  ISSS 2002»
14 years 16 days ago
Design Experience of a Chip Multiprocessor Merlot and Expectation to Functional Verification
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...
Satoshi Matsushita
WOSP
2000
ACM
13 years 12 months ago
A UML tool for an automatic generation of simulation programs
For sometime now, Unified Modelling Language (UML) has been accepted as a standard for designing new systems. Its array of notations helps system designers to capture their ideas ...
L. B. Arief, Neil A. Speirs
HICSS
2007
IEEE
140views Biometrics» more  HICSS 2007»
14 years 1 months ago
Design Pattern Evolution and Verification Using Graph Transformation
This paper presents a graph transformation based approach to design pattern evolution. An evolution of a design pattern includes modifications of pattern elements, such as classes...
Chunying Zhao, Jun Kong, Kang Zhang
CAV
1998
Springer
86views Hardware» more  CAV 1998»
13 years 12 months ago
Formal Verification of Out-of-Order Execution Using Incremental Flushing
We present a two-part approach for verifying out-of-order execution. First, the complexity of out-of-order issue and scheduling is handled by creating der abstraction of the out-of...
Jens U. Skakkebæk, Robert B. Jones, David L....
FASE
2009
Springer
13 years 11 months ago
Interface Generation and Compositional Verification in JavaPathfinder
Abstract. We present a novel algorithm for interface generation of software components. Given a component, our algorithm uses learning techniques to compute a permissive interface ...
Dimitra Giannakopoulou, Corina S. Pasareanu