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ATVA
2004
Springer
138views Hardware» more  ATVA 2004»
13 years 11 months ago
Providing Automated Verification in HOL Using MDGs
While model checking suffers from the state space explosion problem, theorem proving is quite tedious and impractical for verifying complex designs. In this work, we present a veri...
Tarek Mhamdi, Sofiène Tahar
SIGSOFT
2007
ACM
14 years 8 months ago
Finding bugs efficiently with a SAT solver
We present an approach for checking code against rich specifications, based on existing work that consists of encoding the program in a relational logic and using a constraint sol...
Julian Dolby, Mandana Vaziri, Frank Tip
DAC
2004
ACM
14 years 8 months ago
A SAT-based algorithm for reparameterization in symbolic simulation
Parametric representations used for symbolic simulation of circuits usually use BDDs. After a few steps of symbolic simulation, state set representation is converted from one para...
Pankaj Chauhan, Edmund M. Clarke, Daniel Kroening
SAS
2009
Springer
119views Formal Methods» more  SAS 2009»
14 years 8 months ago
Abstraction Refinement for Quantified Array Assertions
ion Refinement for Quantified Array Assertions Mohamed Nassim Seghir1, , Andreas Podelski1 , and Thomas Wies1,2 1 University of Freiburg, Germany 2 EPFL, Switzerland Abstract. We p...
Mohamed Nassim Seghir, Andreas Podelski, Thomas Wi...
CAV
1997
Springer
102views Hardware» more  CAV 1997»
13 years 11 months ago
Efficient Model Checking Using Tabled Resolution
We demonstrate the feasibility of using the XSB tabled logic programming system as a programmable fixed-point engine for implementing efficient local model checkers. In particular,...
Y. S. Ramakrishna, C. R. Ramakrishnan, I. V. Ramak...