8 search results - page 1 / 2 » Verification of analog mixed-signal circuits using labeled h... |
ASPDAC
2007
ACM
13 years 11 months ago
2007
ACM
This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixedsignal (AMS) circuits. The systems are modeled in VHDL-AMS, a hardware des...
ATVA
2004
Springer
14 years 26 days ago
2004
Springer
MTV
2007
IEEE
14 years 1 months ago
2007
IEEE
Abstract—Abstract models of analog/mixed-signal (AMS) circuits can be used for formal verification and system-level simulation. The difficulty of creating these models preclude...
ATVA
2007
Springer
14 years 1 months ago
2007
Springer
This paper presents a bounded model checking algorithm for the verification of analog and mixed-signal (AMS) circuits using a satisfiability modulo theories (SMT) solver. The sys...
FMCAD
2004
Springer
13 years 11 months ago
2004
Springer
In this paper we demonstrate a potential extension of formal verification methodology in order to deal with time-domain properties of analog and mixed-signal circuits whose dynamic...