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» Verification of timing Properties of VHDL
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ENTCS
2002
107views more  ENTCS 2002»
13 years 7 months ago
Monitoring, Checking, and Steering of Real-Time Systems
The MaC system has been developed to provide assurance that a target program is running correctly with respect to formal requirements specification. This is achieved by monitoring...
Moonjoo Kim, Insup Lee, Usa Sammapun, Jangwoo Shin...
DATE
2004
IEEE
174views Hardware» more  DATE 2004»
13 years 11 months ago
Graph-Based Functional Test Program Generation for Pipelined Processors
Functional verification is widely acknowledged as a major bottleneck in microprocessor design. While early work on specification driven functional test program generation has prop...
Prabhat Mishra, Nikil Dutt
ASIAN
2009
Springer
334views Algorithms» more  ASIAN 2009»
13 years 8 months ago
A Dolev-Yao Model for Zero Knowledge
In cryptographic protocols, zero knowledge proofs are employed for a principal A to communicate some non-trivial information t to B while at the same time ensuring that B cannot de...
Anguraj Baskar, Ramaswamy Ramanujam, S. P. Suresh
SIGSOFT
2008
ACM
14 years 8 months ago
Finding programming errors earlier by evaluating runtime monitors ahead-of-time
Runtime monitoring allows programmers to validate, for instance, the proper use of application interfaces. Given a property specification, a runtime monitor tracks appropriate run...
Eric Bodden, Patrick Lam, Laurie J. Hendren
PLDI
2009
ACM
14 years 8 months ago
An integrated proof language for imperative programs
We present an integrated proof language for guiding the actions of multiple reasoning systems as they work together to prove complex correctness properties of imperative programs....
Karen Zee, Viktor Kuncak, Martin C. Rinard