196 search results - page 5 / 40 » Verification of timing Properties of VHDL |
ICALP
2009
Springer
14 years 8 months ago
2009
Springer
We present an AC1 (logDCFL) algorithm for checking LTL formulas over finite paths, thus establishing that the problem can be efficiently parallelized. Our construction provides a f...
EPK
2006
13 years 9 months ago
2006
Abstract: Event-driven Process Chains (EPCs) are a commonly used modelling technique for design and documentation of business processes. Although EPCs have an easy-to-understand no...
FSTTCS
2006
Springer
13 years 11 months ago
2006
Springer
This paper presents a construction for runtime monitors that check real-time properties expressed in timed LTL (TLTL). Due to D'Souza's results, TLTL can be considered a ...
DATE
2010
IEEE
14 years 21 days ago
2010
IEEE
— Today, mobile and embedded real time systems have to cope with the migration and allocation of multiple software tasks running on top of a real time operating system (RTOS) res...
FUIN
2010
13 years 5 months ago
2010
Bounded Model Checking (BMC) is an efficient technique applicable to verification of temporal properties of (timed) distributed systems. In this paper we show for the first time ho...